2024-01-15
From seven package types, look at the history of chip packaging
From seven package types, look at the history of chip packaging
With the development of integrated circuits, there are dozens of types of packaging, not every one of which we will use.
The development of packaging can be seen from the structure: TO－>DIP－>SOP->QFP－>PLCC－>BGA －>CSP.
The development of packaging can be seen from the structure: TO－>DIP－>SOP->QFP－>PLCC－>BGA －>CSP.
Type 1: TO (Transisitor Outline)
The earliest type of package, TO, represented the transistor shell, and many transistors still see them today.
The earliest type of package, TO, represented the transistor shell, and many transistors still see them today.
The transistor also has the form of a patch, which is this SOT type, and SOT-23 is the commonly used triode package form.
The second type: DIP (Double In-line Package)
DIP, or dual-in-line package, was the first type of package that we learned about electronic contact.
DIP, or dual-in-line package, was the first type of package that we learned about electronic contact.
Why is DIP the first type of package we come across? When learning electronics, everyone will use bread boards, learn 51 single-chip computers, and often use this type of package. The chip area of this type of package is large, very good for welding, and suitable for zero-based small white to use.
However, DIP packaging, while useful, has drawbacks. This kind of package chip is easily damaged in the process of plugging, and the reliability is also relatively poor, when doing high-speed circuits, it is not suitable. Therefore, with the development of integrated circuits, DIP packaging has been gradually replaced.
However, DIP packaging, while useful, has drawbacks. This kind of package chip is easily damaged in the process of plugging, and the reliability is also relatively poor, when doing high-speed circuits, it is not suitable. Therefore, with the development of integrated circuits, DIP packaging has been gradually replaced.
Category 3: SOP (Small Outline Package)
If DIP is the most common in-line package, SOP is the most common patch package, and they can be seen everywhere on all types of integrated circuits. SOP, that is, small shape package, basically using plastic packaging. Pins lead from both sides of the package in an L-shape.
If DIP is the most common in-line package, SOP is the most common patch package, and they can be seen everywhere on all types of integrated circuits. SOP, that is, small shape package, basically using plastic packaging. Pins lead from both sides of the package in an L-shape.
SOP packaging technology was developed by Phillip Company in 1968 and 1969, and later gradually derived:
SOJ, J-pin small shape package
TSOP, thin and small shape package
VSOP, very small form factor package
SSOP, reduced SOP
TSSOP, thin reduced SOP
SOT, small shape transistor
SOIC, small form factor integrated circuit
SOJ, J-pin small shape package
TSOP, thin and small shape package
VSOP, very small form factor package
SSOP, reduced SOP
TSSOP, thin reduced SOP
SOT, small shape transistor
SOIC, small form factor integrated circuit
The advantages of SOP package: make a lot of pins around the package chip, convenient packaging operation, relatively high reliability, is one of the current mainstream packaging methods.
Fourth: QFP (Quad Flat Package)
QFP, small square flat package. The QFP package has pins all around the particle, which is quite obvious to identify. Four-side pin flat package. One of the surface mount type packages, with pins leading from four sides in a seagull wing (L) type.
Fourth: QFP (Quad Flat Package)
QFP, small square flat package. The QFP package has pins all around the particle, which is quite obvious to identify. Four-side pin flat package. One of the surface mount type packages, with pins leading from four sides in a seagull wing (L) type.
On the basis of QFP, there are also TQFP packaging, PQFP packaging, TSOP packaging and so on.
TQFP is the abbreviation of the English "Thin Quad Flat Package", that is, thin plastic encapsulation square flat package. The four-sided flat packaging process can effectively use space, thereby reducing the space requirements for printed circuit boards.
PQFP is the abbreviation of the English "Plastic Quad Flat Package", that is, the plastic sealing square flat package. PQFP package chip pin distance is small, the pin is very thin. Generally large-scale or very large scale integrated circuits use this form of packaging, and the number of pins is generally more than 100.
TSOP is the abbreviation of the English "Thin Small Outline Package", that is, thin small size package. A typical feature of TSOP memory packaging technology is to make pins around the package chip. TSOP is suitable for mounting wiring on PCBS with SMT (surface mount) technology. TSOP package shape, parasitic parameter (current changes greatly, causing output voltage disturbance) is reduced, suitable for high-frequency applications, easy to operate, and relatively high reliability.
Fifth: PLCC (Plastic Leaded Chip Carrier)
PLCC, Plastic-sealed J-lead chip package. PLCC package, square shape, 32-pin package, there are pins on all sides, the shape size is much smaller than DIP package. PLCC package is suitable for SMT surface mount technology to install wiring on the PCB, with the advantages of small size and high reliability.
PLCC, Plastic-sealed J-lead chip package. PLCC package, square shape, 32-pin package, there are pins on all sides, the shape size is much smaller than DIP package. PLCC package is suitable for SMT surface mount technology to install wiring on the PCB, with the advantages of small size and high reliability.
Compared with the QFP package mentioned above, the pin is hooked inside and is not easy to deform, but if it is removed, it is more difficult than the QFP package.
Sixth: BGA (Ball Grid Array Package)
Chip integration continues to improve, the number of I/O pins also increases sharply, power consumption also increases, and the requirements for integrated circuit packaging are more stringent. In order to meet the needs of development, BGA packaging began to be applied.
Sixth: BGA (Ball Grid Array Package)
Chip integration continues to improve, the number of I/O pins also increases sharply, power consumption also increases, and the requirements for integrated circuit packaging are more stringent. In order to meet the needs of development, BGA packaging began to be applied.
BGA, that is, ball grid array package, BGA has a smaller volume, better heat dissipation and electrical performance than TSOP. BGA packaging technology has greatly improved the storage capacity per square inch, and memory products using BGA packaging technology are only one-third of the volume of TSOP packaging under the same capacity. In addition, compared with the traditional TSOP package, the BGA package has a more rapid and effective heat dissipation way. However, in welding, the difficulty of BGA has been increased many times, and the average person can not weld.
The seventh: CSP packaging
